Thin-film transistors (TFT's) on a transparent substrate are important for making an active-matrix liquid-crystal display (AMLCD). Because polysilicon thin-film transistors (poly-Si TFT's) have a high field-effect mobility, the potential to realize very large area LCD's, and a capability for peripheral driver circuit integration, much effort has been devoted to developing high-performance poly-Si TFT's.
Using a conventional glass substrate is advantageous for reducing the cost of fabricating TFT's. To realize glass substrate TFT's, the maximum process temperature must be below 600.degree. C. In poly-Si TFT's manufactured under this low temperature limitation, grain boundaries and intragranular defects exert a profound influence on device characteristics and degrade carrier transport. Passivation by hydrogen plasma has been shown to reduce the trap-state density and improve device characteristics. However, the passivation by hydrogen plasma has to be carried out for a period of time long enough for hydrogen to diffuse to grain boundaries and intragranular defects (I-Wei Wu, et al., entitled "Passivation Kinetics of Two Types of Defects in Polysilicon TFT by Plasma Hydrogenation," IEEE Electron Device Lett., Vol. 12, No. 4, pp. 181-183, 1991). In addition to this long hydrogenation time disadvantage, the hydrogen-silicon bonds resulting from the hydrogenation are weak and thus are vulnerable after the device works for a long period of time. The device characteristics deteriorate, so that creates a reliability problem. Various chemical vapor deposition (CVD) methods have been used to fabricate a SiO.sub.2 film as the capping layer of poly-Si TFT's, such as atmospheric pressure CVD (APCVD), low pressure CVD (LPCVD), and plasma enhanced CVD (PECVD), etc. However, the SiO.sub.2 films grown by these methods often have defects like containing moisture or hydrogen bonds therein, a non-smooth surface or a porous microstructure. Moreover, the temperatures of these CVD methods are still too high as compared to the requirements of a low-temperature processed poly-Si TFT.
The present inventors in their pending U.S. patent application (Ser. No. 08/699,234; filing date: Aug. 19, 1996) disclose a poly-Si TFT having a SiO.sub.2 gate insulator grown by ion plating and a method for fabricating the same. The SiO.sub.2 film grown by ion plating has smooth surfaces with dense microstructure and is substantially free of impurities, which shows superior electrical characteristics such as a low leakage current density and a low interface-trap density. Therefore, the poly-Si TFT so-obtained demonstrates superior device characteristics.